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annotate 1wire-config.h @ 32:b0cb873c0206

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Isolate the bus frobbing parts and the delays into a separate header. This means the user only has to edit a single file to suit their situation and allows the code to work with active drive systems as well as passive pullups (ie 1 vs 2 IO pins)
author darius
date Sun, 23 Apr 2006 22:57:16 +0930
parents
children 0aa6bf4b98ae
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b0cb873c0206 Isolate the bus frobbing parts and the delays into a separate header.
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1 /*
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2 * 1 wire header
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3 *
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4 * This is the user servicable stuff - how to do delays and how to
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5 * frob the IO pins.
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6 *
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7 * $Id$
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8 *
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9 * Copyright (c) 2004
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10 * Daniel O'Connor <darius@dons.net.au>. All rights reserved.
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11 *
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12 * Redistribution and use in source and binary forms, with or without
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13 * modification, are permitted provided that the following conditions
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14 * are met:
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15 * 1. Redistributions of source code must retain the above copyright
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16 * notice, this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright
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18 * notice, this list of conditions and the following disclaimer in the
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19 * documentation and/or other materials provided with the distribution.
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20 *
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21 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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24 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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31 * SUCH DAMAGE.
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32 */
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33
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34 /*
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35 * Alter these for your configuration
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36 */
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37
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38 /* Set DDR on the right pins */
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39 #define OWBUSINIT() do { \
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40 DDRD |= _BV(4); \
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41 DDRD &= ~_BV(3); \
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42 } while (0)
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43
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44 /* Read the 1-wire bus, non-inverting logic */
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45 #define OWREADBUS() (PIND & _BV(3) ? 1 : 0)
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46
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47 /* Set the 1-wire bus to 0
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48 * Turns a transistor on to pull it low
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49 */
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50 #define OWSETBUSLOW() PORTD |= _BV(4)
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51
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52 /* Set the 1-wire bus to 1
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53 * Turn the transistor off to let the pullup do its job
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54 */
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55 #define OWSETBUSHIGH() PORTD &= ~_BV(4)
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56
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57 /* _delay_us can only do a delay of 768/clock_freq */
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58 #if F_CPU > 16000000
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59 #error F_CPU > 16MHz, delays need adjusting
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60 #endif
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61
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62 #define OWDELAY_A _delay_us(6) /* 6 usec */
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63 #define OWDELAY_B do { _delay_us(48); _delay_us(16); } while (0) /* 64 usec */
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64 #define OWDELAY_C do { _delay_us(48); _delay_us(12); } while (0) /* 60 usec */
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65 #define OWDELAY_D _delay_us(10) /* 10 usec */
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66 #define OWDELAY_E _delay_us(9) /* 9 usec */
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67 #define OWDELAY_F do { _delay_us(55); } while (0) /* 55 usec */
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68 #define OWDELAY_G /* 0 usec */
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69 #define OWDELAY_H do { _delay_us(48); _delay_us(48); _delay_us(48); \
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70 _delay_us(48); _delay_us(48); _delay_us(48); _delay_us(48); \
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71 _delay_us(48);_delay_us(48); _delay_us(48); } while (0) /* 480 usec */
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72 #define OWDELAY_I do { _delay_us(48); _delay_us(22); } while (0) /* 70 usec */