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annotate 1wire-config-stm32.h @ 15:a50a054d060c

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- Make OWREADBUS work properly. - Fix debug commands.
author Daniel O'Connor <darius@dons.net.au>
date Wed, 08 Feb 2012 10:36:26 +1030
parents 6f8f7b87d2f1
children
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1 /*
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2 * Example configuration header for 1-wire bus code.
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3 *
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4 * This is the user servicable stuff - how to do delays and how to
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5 * frob the IO pins.
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6 *
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7 * Copyright (c) 2009
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8 * Daniel O'Connor <darius@dons.net.au>. All rights reserved.
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9 *
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10 * Redistribution and use in source and binary forms, with or without
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11 * modification, are permitted provided that the following conditions
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12 * are met:
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13 * 1. Redistributions of source code must retain the above copyright
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14 * notice, this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright
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16 * notice, this list of conditions and the following disclaimer in the
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17 * documentation and/or other materials provided with the distribution.
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18 *
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19 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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22 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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29 * SUCH DAMAGE.
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30 */
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31
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32 /*
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33 * The configuration described here has the 1-wire IO on GPIOE3,
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34 * with no pull down, nor VPP
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35 */
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36
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37 #include "stm32f10x.h" /* GPIO* */
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38 #include "hw.h" /* For _usleep16() */
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39
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40 /* Fudge AVR stuff for ARM */
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41 #define PROGMEM
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42 #define PSTR(x) x
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43 #define pgm_read_byte(x) *(x)
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44
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45 /* Init bus */
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46 #define OWBUSINIT()
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47
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48 /* Set the port up to allow reading from the 1 wire bus */
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49 #define OWSETREAD() do { \
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50 GPIO_InitTypeDef GPIO_InitStructure; \
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51 \
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52 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \
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53 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; \
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54 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; \
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55 GPIO_Init(GPIOE, &GPIO_InitStructure); \
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56 } while (0)
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59 /* Read the 1-wire bus, non-inverting logic */
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60 #define OWREADBUS() (GPIO_ReadInputDataBit(GPIOE, GPIO_Pin_3) ? 1 : 0)
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61
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62 /* Set the 1-wire bus to 0
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63 */
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64 #define OWSETBUSLOW() do { \
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65 GPIO_InitTypeDef GPIO_InitStructure; \
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66 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \
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67 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; \
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68 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; \
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69 GPIO_Init(GPIOE, &GPIO_InitStructure); \
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70 GPIO_ResetBits(GPIOE, GPIO_Pin_3); \
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71 } while (0)
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72
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73 /* Set the 1-wire bus to 1
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74 * Change to input and let the pull up do its job
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75 */
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76 #define OWSETBUSHIGH() do { \
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77 GPIO_InitTypeDef GPIO_InitStructure; \
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78 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; \
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79 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; \
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80 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; \
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81 GPIO_Init(GPIOE, &GPIO_InitStructure); \
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82 } while (0)
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83
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84 #define OWDELAY_A _usleep16(6) /* 6 usec */
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85 #define OWDELAY_B _usleep16(64) /* 64 usec */
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86 #define OWDELAY_C _usleep16(60) /* 60 usec */
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87 #define OWDELAY_D _usleep16(10) /* 10 usec */
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88 #define OWDELAY_E _usleep16(9) /* 9 usec */
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89 #define OWDELAY_F _usleep16(55) /* 55 usec */
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90 #define OWDELAY_G /* 0 usec */
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91 #define OWDELAY_H _usleep16(480) /* 480 usec */
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92 #define OWDELAY_I _usleep16(70) /* 70 usec */
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93 #define OWDELAY_J _usleep16(410) /* 410 usec */
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94
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95 #ifdef OW_DEBUG
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96 #define OWPUTS(x) puts(x)
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97 #define OWPUTSP(x) puts(x)
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98 #define OWPRINTFP(fmt, ...) printf(fmt, ## __VA_ARGS__)
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99 #else
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100 #define OWPUTS(x)
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101 #define OWPUTSP(x)
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102 #define OWPRINTFP(fmt, ...)
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103 #endif