# HG changeset patch
# User Daniel O'Connor <darius@dons.net.au>
# Date 1365339845 -34200
# Node ID b21db2b47a27fec7fb00cfe92c8c053040f944e4
# Parent  79c7892d07b3906c5f27b81c8b615aa2b10107d2
Enable DMA mode by initing DMA channel and enabling IRQ handler.

diff -r 79c7892d07b3 -r b21db2b47a27 main.c
--- a/main.c	Sun Apr 07 22:33:16 2013 +0930
+++ b/main.c	Sun Apr 07 22:34:05 2013 +0930
@@ -395,5 +395,11 @@
     NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
     NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
     NVIC_Init(&NVIC_InitStructure);
+
+    /* Enable the SDIO Interrupt */
+    NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn;
+    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+    NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+    NVIC_Init(&NVIC_InitStructure);
 }
 
diff -r 79c7892d07b3 -r b21db2b47a27 sd.c
--- a/sd.c	Sun Apr 07 22:33:16 2013 +0930
+++ b/sd.c	Sun Apr 07 22:34:05 2013 +0930
@@ -362,14 +362,56 @@
 
 void
 SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize) {
-    printf("SD_LowLevel_DMA_RxConfig unimplemented\n");
-    abort();
+    DMA_InitTypeDef DMA_InitStructure;
+
+    DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4);
+
+    /* DMA2 Channel4 disable */
+    DMA_Cmd(DMA2_Channel4, DISABLE);
+
+    /* DMA2 Channel4 Config */
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)0x40018080;
+    DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferDST;
+    DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
+    DMA_InitStructure.DMA_BufferSize = BufferSize / 4;
+    DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+    DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
+    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
+    DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+    DMA_InitStructure.DMA_Priority = DMA_Priority_High;
+    DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+    DMA_Init(DMA2_Channel4, &DMA_InitStructure);
+
+    /* DMA2 Channel4 enable */
+    DMA_Cmd(DMA2_Channel4, ENABLE); 
 }
 
 void
 SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize) {
-    printf("SD_LowLevel_DMA_TxConfig unimplemented\n");
-    abort();
+    DMA_InitTypeDef DMA_InitStructure;
+
+    DMA_ClearFlag(DMA2_FLAG_TC4 | DMA2_FLAG_TE4 | DMA2_FLAG_HT4 | DMA2_FLAG_GL4);
+
+    /* DMA2 Channel4 disable */
+    DMA_Cmd(DMA2_Channel4, DISABLE);
+
+    /* DMA2 Channel4 Config */
+    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)0x40018080;
+    DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferSRC;
+    DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
+    DMA_InitStructure.DMA_BufferSize = BufferSize / 4;
+    DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+    DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
+    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
+    DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+    DMA_InitStructure.DMA_Priority = DMA_Priority_High;
+    DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+    DMA_Init(DMA2_Channel4, &DMA_InitStructure);
+
+    /* DMA2 Channel4 enable */
+    DMA_Cmd(DMA2_Channel4, ENABLE);  
 }
 
 uint32_t SD_DMAEndOfTransferStatus(void) {
@@ -478,3 +520,9 @@
 	       buf[i + 8], buf[i + 9], buf[i + 10], buf[i + 11], buf[i + 12], buf[i + 13], buf[i + 14], buf[i + 15]);
     }
 }
+
+void SDIO_IRQHandler(void) {
+  /* Process All SDIO Interrupt Sources */
+  SD_ProcessIRQSrc();
+}
+
diff -r 79c7892d07b3 -r b21db2b47a27 stm32_eval.h
--- a/stm32_eval.h	Sun Apr 07 22:33:16 2013 +0930
+++ b/stm32_eval.h	Sun Apr 07 22:34:05 2013 +0930
@@ -7,8 +7,8 @@
 
 /* Going to 4 bit mode gives CRC errors */
 #define SD_NO_4BIT
-//#define SD_DMA_MODE                                ((uint32_t)0x00000000)
-#define SD_POLLING_MODE                            ((uint32_t)0x00000002)
+#define SD_DMA_MODE                                ((uint32_t)0x00000000)
+//#define SD_POLLING_MODE                            ((uint32_t)0x00000002)
 
 /* No idea if this is for all SD cards. The one I have has 1024 byte blocks but 512 byte reads work
  * Note that SD_ReadBlock forces blocksize to be 512 and divides the address by 512 but only for SDIO_HIGH_CAPACITY_SD_CARD's
@@ -21,4 +21,3 @@
 void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize);
 uint32_t SD_DMAEndOfTransferStatus(void);
 
-