diff hw.c @ 41:2db4bb90cfca

Remove unused timer and (broken) I2C code.
author Daniel O'Connor <darius@dons.net.au>
date Mon, 01 Apr 2013 20:51:11 +1030
parents a38003b97de6
children ace431a0d0f5
line wrap: on
line diff
--- a/hw.c	Mon Apr 01 20:06:03 2013 +1030
+++ b/hw.c	Mon Apr 01 20:51:11 2013 +1030
@@ -9,16 +9,6 @@
 #define I2C_TIMEOUT 10000
 static void	hw_port_cfg(void);
 
-/* Wait for cnt microseconds */
-void
-_usleep16(uint16_t cnt) {
-    TIM6->ARR = cnt > 3 ? cnt - 3 : cnt;
-    TIM_SetCounter(TIM6, 0);
-    TIM_Cmd(TIM6, ENABLE);
-    while ((TIM6->CR1 & TIM_CR1_CEN) != 0)
-	;
-}
-
 void
 hw_init(void) {
     hw_port_cfg();
@@ -261,21 +251,6 @@
     /* SPI1 enable */
     SPI_Cmd(SPI1, ENABLE);
 
-    /* Configure TIM6 for interval timing */
-    /* Reset TIM6 */
-    TIM_DeInit(TIM6);
-
-    /* Time Base configuration */
-    TIM_TimeBaseStructure.TIM_Period = 0;
-    TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock / 2 / 1000000) - 1; /* 1 MHz clock */
-    TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);
-
-    TIM_Cmd(TIM6, DISABLE);
-
-    /* Setup for single pulse mode clear UDIS */
-    TIM_SelectOnePulseMode(TIM6, TIM_OPMode_Single);
-    TIM_UpdateDisableConfig(TIM6, DISABLE);
-
     /* Setup GPIO for delay test (2) 1-wire (3) & temp ctrl (4/5)
      * PE2 -> 3 (on header)
      * PE3 -> 4
@@ -287,21 +262,9 @@
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
     GPIO_Init(GPIOE, &GPIO_InitStructure);
 
+    /* Setup 1-wire bus */
     OWInit();
 
-#if 0
-    while (1) {
-	GPIO_SetBits(GPIOE, GPIO_Pin_2);
-	_usleep16(10);
-	GPIO_ResetBits(GPIOE, GPIO_Pin_2);
-	_usleep16(20);
-	GPIO_SetBits(GPIOE, GPIO_Pin_2);
-	_usleep16(30);
-	GPIO_ResetBits(GPIOE, GPIO_Pin_2);
-	_usleep16(100);
-    }
-#endif
-
     /* Setup I2C bus */
       
     /* Configure SCL/SDA pins */
@@ -325,47 +288,10 @@
     /* Start I2C controller */
     I2C_Cmd(I2C1, ENABLE);
 
-#if 0
-    uint32_t I2C_TimeOut = I2C_TIMEOUT;
-
-    /* Clear the I2C1 AF flag */
-    I2C_ClearFlag(I2C1, I2C_FLAG_AF);
-
-    /* Enable I2C1 acknowledgement if it is already disabled by other function */
-    I2C_AcknowledgeConfig(I2C1, ENABLE);
-
-    /*---------------------------- Transmission Phase ---------------------------*/
-
-    /* Send I2C1 START condition */
-    I2C_GenerateSTART(I2C1, ENABLE);
-
-    /*!< Test on I2C1 EV5 and clear it */
-    while ((!I2C_GetFlagStatus(I2C1, I2C_FLAG_SB)) && I2C_TimeOut) {
-	I2C_TimeOut--;
-    }
-
-    if (I2C_TimeOut == 0) {
-	return ERROR;
-    }
-  
-    I2C_TimeOut = I2C_TIMEOUT;
-    /* Send STLM75 slave address for write */
-    I2C_Send7bitAddress(I2C1, LM75_ADDR, I2C_Direction_Transmitter);
-
-    while ((!I2C_CheckEvent(LM75_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) && I2C_TimeOut) {
-	I2C_TimeOut--;
-    }
-
-    if ((I2C_GetFlagStatus(LM75_I2C, I2C_FLAG_AF) != 0x00) || (I2C_TimeOut == 0)) {
-	return ERROR;
-    } else {
-	return SUCCESS;
-    }
-
-#endif
-
-    // From http://forums.arm.com/index.php?/topic/13949-cycle-count-in-cortex-m3/
-    // via http://stackoverflow.com/questions/11530593/cycle-counter-on-arm-cortex-m4-or-m3/11530829#11530829
+    /* Enable debug block for cycle counter
+     * From http://forums.arm.com/index.php?/topic/13949-cycle-count-in-cortex-m3/
+     * via http://stackoverflow.com/questions/11530593/cycle-counter-on-arm-cortex-m4-or-m3/11530829#11530829
+     */
     volatile uint32_t *DWT_CONTROL = (uint32_t *)0xe0001000;
     volatile uint32_t *SCB_DEMCR = (uint32_t *)0xe000edfc;